1. Field of Invention
The present invention relates to a signal amplifier circuit, in which controllable amplifier gain. More particularly, the present invention relates to a variable-gain amplifier circuit and a method of changing the gain amplifier path suitable for receiving and amplifying an image sensing signal, wherein the path of amplifying the image sensing signal is also controllable.
2. Description of Related Art
Complementary metal oxide semiconductor (CMOS) image sensor is an image sensor widely used at present and can be produced by using a standard semiconductor process. Since CMOS devices have the advantages of low power consumption, low cost and can be well integrated with peripheral circuits, the CMOS image sensors have been widely used in many fields such as digital cameras, camera mobile phones, video recorders, security monitor systems, and medical equipments.
Generally, a CMOS image sensor has a variable-gain amplifier circuit with an amplification factor of 8˜24, wherein the factor is subdivided. Based on the consideration of the circuit layout and the linearity of variable gain amplifiers (VGA), the variable-gain amplifier circuit in the CMOS image sensor usually comprises a plurality of VGAs connected in series. As an operational amplifier in the VGA are not optimal, for example, having a limited DC gain and limited bandwidth, the input sensing signal is distorted after passing through each stage of the amplifying circuit. Therefore, in order to reduce distortion, the DC gain and bandwidth of the operational amplifier must be increased. However, the above two characteristics, impacting each other, cannot be improved simultaneously. In addition, after passing through the variable-gain amplifier circuit, the signal must be converted to be digital data by a high-speed analog-to-digital converter (ADC), so the quality of the signal amplified by the VGAs must exceed the resolution of the subsequent ADC. Therefore, the operational amplifier in the preceding VGA must meet a high requirement. To achieve the requirements of a high DC gain and broadband, the operational amplifier usually consumes a large amount of power and occupies a large area of the chip. In another aspect, since the input sensing signal must pass through every stage of VGA to reach the ADC, the gain error of the whole circuit is increased with the increase of the number of amplifiers and the latency of the whole circuit is increased accordingly.
FIG. 1 is a block view of a variable-gain amplifier circuit 100 for receiving and amplifying the image sensing signal in the conventional CMOS image sensor. As shown in FIG. 1, the variable-gain amplifier circuit 100 comprises a VGA 110 and a VGA 120 connected in series. As such, the input sensing signal must pass through the VGA 110 and the VGA 120 to reach an ADC 130. If a feedback factor β1 of the VGA 110 and a feedback factor β2 of the VGA 120 are both 1, the gain of the VGA 110 and the gain of the VGA 120 are both 1, i.e., the output power levels are 0 db. If the DC gain of the operational amplifier in the VGA 110 is A1 and the DC gain of the operational amplifier in the VGA 120 is A2, the gain error generated by the VGA 110 is calculated to be 1/(1+A1) and the gain error generated by the VGA 120 is 1/(1+A2). Thus, after the input sensing signal passes through the VGA 110 and the VGA 120, the signal distortion caused by the gain errors of the above two amplifiers is approximately 1/(1+A1)+1/(1+A2). If the resolution of the ADC 130 is 10 bits, the distortion of the signal input into the ADC 130 must be smaller than one half of the least significant bit (LSB) of the ADC 130 (i.e., ½11). As such, the values of A1 and A2 must be larger than 4096. Besides, if neither of the output power levels of the VGA 110 and the VGA 120 is 0 db, the values of A1 and A2 must be larger.
In the conventional variable-gain amplifier circuit, the way to reduce the signal distortion is to increase the DC gain of the operational amplifier in the VGA while maintaining the bandwidth of the operational amplifier. However, this design method may cause a great increase in the chip area and power consumption of the circuit.